october 2001 ? 2001 fairchild semiconductor corporation FDW2507NZ rev c FDW2507NZ dual n-channel 2.5v specified powertrench ? ? ? ? mosfet general description this dual n-channel mosfet has been designed using fairchild semiconductor?s advanced powertrench process to optimize the r ds(on) @ v gs = 2.5v on special tssop-8 lead frame with all the drains on one side of the package. applications ? li-ion battery pack features ? 7.5 a, 20 v r ds(on) = 19 m ? @ v gs = 4.5 v r ds(on) = 23 m ? @ v gs = 2.5 v ? isolated source and drain pins ? esd protection diode (note 3) ? high performance trench technology for extremely low r ds(on) @ v gs = 2.5 v ? low profile tssop-8 package s 1 g 1 s 2 g 2 d d d d tssop-8 pin 1 5 4 6 3 7 2 8 1 absolute maximum ratings t a =25 o c unless otherwise noted symbol parameter ratings units v dss drain-source voltage 20 v v gss gate-source voltage 12 v i d drain current ? continuous (note 1a) 7.5 a ? pulsed 30 power dissipation for single operation (note 1a) 1.6 p d (note 1b) 1.1 w t j , t stg operating and storage junction temperature range ?55 to +150 c thermal characteristics r ja thermal resistance, junction-to-ambient (note 1a) 77 c/w r ja thermal resistance, junction-to-ambient (note 1b) 114 c/w package marking and ordering information device marking device reel size tape width quantity 2507nz FDW2507NZ 13?? 12mm 3000 units FDW2507NZ
FDW2507NZ rev c electrical characteristics t a = 25c unless otherwise noted symbol parameter test conditions min typ max units off characteristics bv dss drain?source breakdown voltage v gs = 0 v, i d = 250 a 20 v ? bv dss ? t j breakdown voltage temperature coefficient i d = 250 a, referenced to 25 c ?13 mv/ c i dss zero gate voltage drain current v ds = 16 v, v gs = 0 v 1 a i gssf gate?body leakage, forward v gs = 12 v, v ds = 0 v 10 a i gssr gate?body leakage, reverse v gs = ?12 v, v ds = 0 v ?10 a on characteristics (note 2) v gs(th) gate threshold voltage v ds = v gs , i d = 250 a 0.6 0.8 1.5 v ? v gs(th) ? t j gate threshold voltage temperature coefficient i d = 250 a, referenced to 25 c 4 mv/ c r ds(on) static drain?source on?resistance v gs = 4.5 v, i d = 7.5 a v gs = 2.5 v, i d = 6.8 a v gs = 4.5 v, i d = 7.5 a, t j =125 c 15 17 20 19 23 27 m ? i d(on) on?state drain current v gs = 4.5 v, v ds = 5 v 30 a g fs forward transconductance v ds = 5 v, i d = 7.5 a 31 s dynamic characteristics c iss input capacitance 2152 pf c oss output capacitance 512 pf c rss reverse transfer capacitance v ds = 10 v, v gs = 0 v, f = 1.0 mhz 263 pf switching characteristics (note 2) t d(on) turn?on delay time 12 22 ns t r turn?on rise time 13 23 ns t d(off) turn?off delay time 35 56 ns t f turn?off fall time v dd = 10 v, i d = 1 a, v gs = 4.5 v, r gen = 6 ? 19 34 ns q g total gate charge 20 28 nc q gs gate?source charge 3 nc q gd gate?drain charge v ds = 10 v, i d = 7.5 a, v gs = 4.5 v 5nc drain?source diode characteristics and maximum ratings i s maximum continuous drain?source diode forward current 1.3 a v sd drain?source diode forward voltage v gs = 0 v, i s = 1.3 a (note 2) 0.6 1.2 v t rr diode reverse recovery time 26 ns q rr diode reverse recovery charge i f = 7.5a d if /d t = 100 a/s (note 2) 21 nc notes: 1. r ja is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the so lder mounting surface of the drain pins. r jc is guaranteed by design while r ca is determined by the user's board design. a) 77c/w when mounted on a 1in 2 pad of 2 oz copper b) 114c/w when mounted on a minimum pad of 2 oz copper scale 1 : 1 on letter size paper 2. pulse test: pulse width < 300 s, duty cycle < 2.0% 3. the diode connected between the gate and source serves only as protection against esd. no gate overvoltage rating is implied. FDW2507NZ
FDW2507NZ rev c typical characteristics 0 5 10 15 20 00.511.52 v ds , drain-source voltage (v) i d , drain current (a) 3.5v 2.5v 2.0v v gs = 4.5v 1.5v 0.8 1 1.2 1.4 1.6 1.8 0 5 10 15 20 i d , drain current (a) r ds(on) , normalized drain-source on-resistance v gs = 2.0v 3.5v 3.0v 4.5v 2.5v figure 1. on-region characteristics. figure 2. on-resistance variation with drain current and gate voltage. 0.6 0.8 1 1.2 1.4 1.6 -50 -25 0 25 50 75 100 125 150 t j , junction temperature ( o c) r ds(on) , normalized drain-source on-resistance i d = 7.5a v gs = 4.5v 0.01 0.015 0.02 0.025 0.03 0.035 0.04 12345 v gs , gate to source voltage (v) r ds(on) , on-resistance (ohm) i d = 3.8a t a = 125 o c t a = 25 o c figure 3. on-resistance variation with temperature. figure 4. on-resistance variation with gate-to-source voltage. 0 5 10 15 20 25 30 0.511.522.5 v gs , gate to source voltage (v) i d , drain current (a) t a = -55 o c 25 o c 125 o c v ds = 5v 0.0001 0.001 0.01 0.1 1 10 100 0 0.2 0.4 0.6 0.8 1 1.2 v sd , body diode forward voltage (v) i s , reverse drain current (a) t a = 125 o c 25 o c -55 o c v gs = 0v figure 5. transfer characteristics. figure 6. body diode forward voltage variation with source current and temperature. FDW2507NZ
FDW2507NZ rev c typical characteristics 0 1 2 3 4 5 0 5 10 15 20 25 q g , gate charge (nc) v gs , gate-source voltage (v) i d = 7.5a v ds = 5v 15v 10v 0 500 1000 1500 2000 2500 3000 048121620 v ds , drain to source voltage (v) capacitance (pf) c iss c rss c oss f = 1mhz v gs = 0 v figure 7. gate charge characteristics. figure 8. capacitance characteristics. 0.01 0.1 1 10 100 0.1 1 10 100 v ds , drain-source voltage (v) i d , drain current (a) dc 10s 1s 100ms r ds(on) limit v gs = 4.5v single pulse r ja = 114 o c/w t a = 25 o c 10ms 1ms 100us 0 10 20 30 40 50 0.001 0.01 0.1 1 10 100 1000 t 1 , time (sec) p(pk), peak transient power (w) single pulse r ja = 114c/w t a = 25c figure 9. maximum safe operating area. figure 10. single pulse maximum power dissipation. 0.001 0.01 0.1 1 0.0001 0.001 0.01 0.1 1 10 100 1000 t 1 , time (sec) r(t), normalized effective transient thermal resistance r ja (t) = r(t) + r ja r ja =114 c/w t j - t a = p * r ja (t) duty cycle, d = t 1 / t 2 p (p k ) t 1 t 2 single pulse 0.01 0.02 0.05 0.1 0.2 d = 0.5 figure 11. transient thermal response curve. thermal characterization performed using the conditions described in note 1b. transient thermal response will change depending on the circuit board design. FDW2507NZ
tssop(8lds) tape and reel data january 2001, rev. b ?2001 fairchild semiconductor corporation tssop(8lds) packaging configuration: figure 1.0 components leader tape 1680mm minimum or 210 empty pockets trailer tape 640mm minimum or 80 empty pockets tssop(8lds) tape leader and trailer configuration: figure 2.0 cover tape carrier tape note/comments packaging option tssop (8lds) packaging information standard (no flow code) packaging type reel size tnr 13" dia qty per reel/tube/bag 2,500 box dimension (mm) 355x333x40 max qty per box 5,000 weight per unit (gm) 0.020 weight per reel (kg) 0.426 f63tnr label sample lot: cbhk741b019 part id: fdw2502p d/c1: h9942ab qty1: spec rev: spec: qty: 2500 d/c2: qty2: cpn: (f63tnr)3.2 tssop-8lds unit orientation pin 1 f63tnr label packaging description: tssop-8lds parts are shipped in tape. the carrier tape is made from a dissipative (carbon filled) polycarbonate resin. the cover tape is a multilayer film (heat activated adhesive in nature) primarily composed of polyester film, adhesive layer, sealant, and anti-static sprayed agent. these reeled parts in standard option are shipped with 2,500 units per 13" or 330cm diameter reel. the reels are white in color and is made of polystyrene plastic (anti- static coated). these full reels are individually barcode labeled and placed inside a standard intermediate box (illustrated in figure 1.0) made of recyclable corrugated brown paper. one box contains one reel. these boxes are placed inside a barcode labeled shipping box which comes in different sizes depending on the number of parts shipped. f h94 2502p f h94 2502p f h94 2502p f h94 2502p f h94 2502p antistatic cover tape static dissipative embossed carrier tape fairchild semiconductor corporation f63tnr label f63tnr label f63tnr label 355mm x 333mm x 40mm intermediate container for 13" reel option embossed esd marking attention observeprecautions for handling electrostatic sensitive devices attention observe precautions for handling electrostatic sensitive devices embossed esd marking attention observeprecautions for handling electrostatic sensitive devices attention observeprecautions for handling electrostatic sensitive devices attention observe precautions for handling electrostatic sensitive devices attention observe precautions for handling electrostatic sensitive devices
january 2001, rev. b tssop(8lds) tape and reel data, continued dimensions are in millimeter pkg type a0b0 w d0d1e1e2 f p1p0k0 t wctc tssop(8lds) (16mm) see notes below see notes below 16.0 +/-0.3 1.55 +/-0.05 1.60 +/-0.10 1.75 +/-0.10 14.25 min 7.50 +/-0.05 8.0 +/-0.1 4.0 +/-0.1 see notes below 0.450 +/- 0.150 13.0 +/-0.3 0.06 +/-0.02 p1 a0 d1 p0 f w e1 d0 e2 b0 tc wc k0 t dimensions are in inches and millimeters tape size reel option dim a dim b dim c dim d dim n dim w1 dim w2 dim w3 (lsl-usl) 16mm 13" dia 13.00 330 0.059 1.5 512 +0.020/-0.008 13 +0.5/-0.2 0.795 20.2 4.00 101.6 0.488 +0.078/-0.000 12.4 +2/0 0.724 18.4 0.626 ? 0.764 15.9 ? 19.4 see detail aa dim a max 13" diameter reel w3 w2 max measured at hub w1 measured at hub dim n dim d min dim c b min detail aa notes: a0, b0, and k0 dimensions are determined with respect to the eia/jedec rs-481 rotational and lateral movement requirements (see sketches a, b, and c). 20 deg maximum component rotation 0.5mm maximum 0.5mm maximum sketch c (top view) component lateral movement typical component cavity center line 20 deg maximum typical component center line b0 a0 sketch b (top view) component rotation sketch a (side or front sectional view) component rotation user direction of feed tssop(8lds) embossed carrier tape configuration: figure 1.0 tssop(8lds) reel configuration: figure 2.0
tssop-8 (fs pkg code s4) tssop-8 package dimensions january 2000, rev. b 1:1 scale 1:1 on letter size paper dimensions shown below are in millimeters part weight per unit (gram): 0.0334 ?2000 fairchild semiconductor international
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